The supply chain states that TSMC will increase wafer prices by 3% to 6% starting from January 2027

Supply chain sources say that TSMC's wafer foundry prices are set to rise again, with adjustments to Wafer Out prices based on different processes starting from January 2027, with an increase of about 3% to 6%. The utilization rate of 8-inch factories exceeds 100%, and processes below 45 nanometers are fully loaded, with order visibility extending to 2030. The increase for advanced processes is higher, while mature and specialty processes are negotiated individually based on products, utilization rates, and customer conditions. TSMC has not responded to market rumors.

Supply chain sources indicate that TSMC's 2-nanometer and 3-nanometer processes are in short supply, and the pressure on advanced packaging capacities such as CoWoS has not been alleviated. Customers find it difficult to switch suppliers immediately even in the face of price increases. The factory in Arizona, USA, reflects higher manufacturing costs, and the foundry quotes remain high. After the price adjustment, quotes from foundries such as Samsung Electronics, Intel, United Microelectronics Corporation, and World Advanced, as well as testing and packaging factories and IC design customers, may also be affected. United Microelectronics Corporation, Powerchip Semiconductor Manufacturing Corporation, and World Advanced have announced price increase strategies, which will continue until 2027.

The supply chain states that this wave of AI demand has increased the need for PMIC, MCU, driver ICs, analog ICs, and sensors, in addition to GPUs, ASICs, and HBM. IC design companies point out that after the wafer price increase, product costs need to be reassessed, with higher-end GPUs and ASICs having relatively larger pass-through space. TSMC Chairman Wei Zhejia has stated that customers do not switch wafer foundry partners just because they are dissatisfied today. Supply chain sources say that orders transferred from Google, Apple, NVIDIA, and others mostly involve non-core chips or limited-scale orders, with no significant changes observed in the high-end process customers' chip placements.